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SYSTEM-ON-CHIP FUER DIE 3G MOBILKOMMUNIKATION über die Herausforderung des Entwurfs ultrakomplexer-heterogener Systeme

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Abstract:
The goal of this talk is to address critical issues and research directions in the design of systems —on —silicon. The talk centers around a number of perhaps controversial facts and conjectures as outlined below. As a result, the talk may indeed offer more questions than answers. Today´s state of semiconductor technology makes it possible to fabricate chips of M x 10 Mio gates. While we still expect Moore’s law to remain valid in the next decade for memory chips, we conjecture a far smaller growth —rate for digital signal processing systems (DSP ´s). We attribute this to two widening gaps: an "architecture gap" and a "design-productivity gap." We argue that we master complexity very well, provided that heterogeneity is sufficiently low. For example, a memory chip is an extremely complex but completely homogeneous system. In contrast, all advanced signal processing systems are comprised of a large number of both programmable and hard-wired subsystems, resulting in systems-on-silicon which are both complex and heterogeneous. We are still far from understanding this class of system. This is what we call the "architecture gap." The "design-gap" focuses on the reality that the sheer complexity a true system design requires a higher level of abstraction than is currently available. Such a level of abstraction must, of course, be supported by appropriate design tools. This in turn requires a mathematical (i.e., computational) description to consistently model control-and data flow — a mathematics which is still in infancy. It has been rightly said that we are at the dawn of a new mathematical system theory, similar to the developments in the sixties. But signal processing in communications is more than just hardware. It is the process of joint algorithm —architecture design. A system’s functionality is either mapped onto one of the programmable blocks or onto an ASIC—block in the process of hardware-software co-design, thus seeking an optimum in the space of flexibility versus power consumption. In short, the path towards understanding the system design of SOC´s requires a huge effort in fundamental research, spanning a wide range from deep mathematical topics ( "computational models") to architecture-tool, -circuit, and -algorithm design. Further complicating this path towards understanding and mastering SOC-design is the interaction between system-design and deep-sub-micron issues. It is the opinion of this speaker that research contributions by universities in the above-mentioned areas is critical to the future of the European telecommunication industry. It is also this speaker´s belief that progress will only be possible if we find effective ways to teach the subject of system design at our schools.

http://www.ert.rwth-aachen.de/
Type of Seminar:
New Vistas
Speaker:
Univ.-Prof. Dr. Heinrich Meyr
Lehrstuhl für Integrierte Systeme, RWTH, Aachen Germany
Date/Time:
Dec 07, 1998   17:15
Location:

ETF E1
Contact Person:

Prof. M.Morari
No downloadable files available.
Biographical Sketch:
H. Meyr received his M.S and Ph.D. from ETH Zurich, Switzerland. He spent over 12 years in various research and management positions in industry before accepting a professorship in Electrical Engineering at Aachen University of Technology (RWTH Aachen) in 1977. He has worked extensively in the areas of communication theory, synchronization, and digital signal processing for the last thirty years. His research has been applied to the design of many industrial products. At RWTH Aachen he heads an institute involved in the analysis and design of complex signal processing systems for communication applications. He was a co-founder of CADIS GmbH (acquired 1993 by Synopsys, Mountain View, California) a company which commercialized the tool suite COSSAP . Dr.Meyr is currently serving on the board of of two companies in the communications industry. Recently he was also appointed as a member of the technical advisory board of MorpICs ,Cupertino,California. Dr Meyr has published numerous IEEE papers and holds many patents . He is author (together with Dr. G. Ascheid ) of the book "Synchronization in Digital Communications", Wiley 1990 and of the book "Digital Communication Receivers. Synchronization, Channel Estimation, and Signal Processing" (together with Dr. M. Moeneclaey and Dr. S. Fechtel), Wiley, October 1997. As well as being a Fellow of the IEEE he has served as Vice President for International Affairs of the IEEE Communications Society Dr. Meyr is currently a visiting professor at the EE- department of UC Berkeley, California